A Low-Power and Energy-Efficient D-Band CMOS Four-Channel Receiver with Integrated LO Generation for Digital Beamforming Arrays

This work presents a D-band receiver characterized inside a four-channel transceiver with integrated local oscillator generation and distribution, intended for use in digital beamforming arrays. The receiver leverages a low-noise amplifier with an active balun to minimize its noise figure, while the local oscillator is optimized for low power consumption to enable scaling to larger arrays. A prototype implemented in 28-nm CMOS is flip-chip packaged onto an organic interposer with patch antenna arrays. A wireless downlink with the proposed receiver channel capable of supporting a data rate in excess of 12 Gb/s with QPSK and 16-QAM modulation, while achieving one of the lowest DC power consumption levels per element and energy-per-bit at 98 mW/element and 8.1 pJ/bit, respectively, demonstrates competitive performance and the highest level of integration compared to other D-band CMOS receiver wireless links.