Abstract:
This paper presents an on-wafer thru-reflect-series-resistance (TRS) VNA calibration in CMOS for device characterization at cryogenic temperatures. The algorithm resembles LRRM calibration while requiring only three calibration structures. The series-resistor standard is implemented using the polysilicon layer in the CMOS process, and its temperature dependency is characterized. We validate the calibration results using a 40-nm NMOS from DC–20 GHz using a cryogenic probe station down to 4K.
Publication date:
January 1, 2023
Publication type:
Conference Paper