Abstract:
Advances in packaging technologies, combined with reduced bump pitches are rapidly enabling the disaggregation of large SoCs into chiplet based System in Package (SiP) solutions. Development and adoption of the UCIe standard has paved the way for power efficient, low latency, high bandwidth D2D link designs that are crucial to enable the disaggregation of high-performance systems. SerDes transceivers need to adopt advanced circuit techniques to meet the challenging performance targets of these D2D links. This talk will explore the architectural challenges of both standard (SP) and advanced package (AP) D2D transceiver designs, showcase circuit techniques to address performance challenges and present state of the art measurement data for UCIe Links.
About the Speaker
Didem Turker Melek is a Design Engineering Group Director in Silicon Solutions Group at Cadence where she leads the Die-to-Die Product Group, developing high performance transceivers and PHY for D2D communications. Prior to Cadence, she led a design team at the SerDes Technology Group at Xilinx, developing high speed SerDes and RF SoC transceivers. Dr. Turker holds 11 U.S patents, authored numerous papers and gave talks on wireline communications and analog mixed signal circuit design. She is a member of the Cadence Patent Committee and served as technical program chair and as general conference chair at the global Cadence Innovation Conference. She has been an ISSCC technical program committee member since 2022. She is the recipient of ISSCC 2019 Outstanding Forum Speaker Award, the 2015 Ross Freeman Technical Innovation Award and has a Ph.D. in Electrical Engineering from Texas A&M University.